vhdl_pic - PIC16F84-compatible CPU in VHDL on a Tang Primer 25K. Plays snake.

	Commit message (Collapse)	Author	Age	Files	Lines
*	test snake	Väinö Kauppila	2026-04-20	1	-2/+2
\|
*	remove redundant clock input from verilog generator	Väinö Kauppila	2026-04-20	3	-31/+19
\|
*	prog rom generation using Amaranth	Väinö Kauppila	2026-04-20	11	-158/+4308
\|
*	snake	Väinö Kauppila	2026-04-20	1	-1/+1
\|
*	snake uart recv SM	Väinö Kauppila	2026-04-20	1	-14/+27
\|
*	increase to 8kB of progmem. bring back score couting	Väinö Kauppila	2026-04-20	1	-16/+16
\|
*	4K progmem	Väinö Kauppila	2026-04-20	4	-30/+60
\|
*	snake	Väinö Kauppila	2026-04-20	1	-46/+118
\|
*	snake	Väinö Kauppila	2026-04-20	2	-0/+123
\|
*	fix makefile sim issue	Vaino Kauppila	2026-04-19	1	-2/+2
\|
*	interrupts working now with timer	Väinö Kauppila	2026-04-19	6	-30/+31
\|
*	BSRAM progmem. fix Makefile memory command that does not work. add ↵	Väinö Kauppila	2026-04-19	16	-46/+864
\| \| \| \|	interrupts, bank 1, timer0. Timer0 not tested.
*	refactor dir structure, add fib.c	Vaino Kauppila	2026-04-19	23	-1188/+173
\|
*	fix operand order of subtraction. add rollover counter UART test.	Vaino Kauppila	2026-04-19	6	-268/+313
\|
*	starting files and example programs	Väinö Kauppila	2026-04-19	25	-0/+3307