From 46e1210381106707c2df7f07c56023eb6b760763 Mon Sep 17 00:00:00 2001 From: Väinö Kauppila Date: Sun, 19 Apr 2026 19:02:42 +0300 Subject: BSRAM progmem. fix Makefile memory command that does not work. add interrupts, bank 1, timer0. Timer0 not tested. --- hdl/pic_top.vhd | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'hdl/pic_top.vhd') diff --git a/hdl/pic_top.vhd b/hdl/pic_top.vhd index f0cb4bd..f5bd386 100644 --- a/hdl/pic_top.vhd +++ b/hdl/pic_top.vhd @@ -14,7 +14,8 @@ entity pic_top is uart_rx : in std_logic; -- B3 uart_tx : out std_logic; -- C3 activity_led : out std_logic; -- E8 — driven by port_b(0) - led : out std_logic -- L6 — driven by port_a(0), blink from C + led : out std_logic; -- L6 — driven by port_a(0), blink from C + ow_pin : inout std_logic -- 1-Wire bus (4.7 kohm pull-up externally) ); end entity pic_top; @@ -56,6 +57,7 @@ begin rom : entity work.prog_rom port map ( + clk => clk, addr => pc, data => opcode ); @@ -75,7 +77,8 @@ begin port_a => port_a, port_b => port_b, uart_tx => uart_tx, - uart_rx => uart_rx + uart_rx => uart_rx, + ow_pin => ow_pin ); end architecture rtl; -- cgit v1.3