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| author | Väinö Kauppila <vaino@vke.fi> | 2026-04-20 15:11:08 +0300 |
|---|---|---|
| committer | Väinö Kauppila <vaino@vke.fi> | 2026-04-20 15:11:08 +0300 |
| commit | b33ebdfd1087bd1de038e23fd256ad5cc6576cfd (patch) | |
| tree | 4d1118c3c7f3a2bc9d283049ea07f6726048ceda /fw/fpga_pic.lkr | |
| parent | 922c620bf0921a60e15e8abe627b3199e7e1e12a (diff) | |
| download | vhdl_pic-b33ebdfd1087bd1de038e23fd256ad5cc6576cfd.tar.gz vhdl_pic-b33ebdfd1087bd1de038e23fd256ad5cc6576cfd.zip | |
4K progmem
Diffstat (limited to 'fw/fpga_pic.lkr')
| -rw-r--r-- | fw/fpga_pic.lkr | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/fw/fpga_pic.lkr b/fw/fpga_pic.lkr new file mode 100644 index 0000000..3fc716f --- /dev/null +++ b/fw/fpga_pic.lkr @@ -0,0 +1,22 @@ +// Custom linker script for FPGA PIC implementation. +// Code page extended to 4K words (real 16f84a only has 1K). +// Bank 1 gprnobank left unprotected so UDL sections can be placed there. +// UART/OW registers at 0x70-0x75 are left out of gprnobank. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFF +CODEPAGE NAME=.idlocs START=0x2000 END=0x2003 PROTECTED +CODEPAGE NAME=devid START=0x2006 END=0x2006 PROTECTED +CODEPAGE NAME=.config START=0x2007 END=0x2007 PROTECTED +CODEPAGE NAME=eedata START=0x2100 END=0x213F PROTECTED + +DATABANK NAME=sfr0 START=0x0 END=0xB PROTECTED +DATABANK NAME=sfr1 START=0x80 END=0x8B PROTECTED + +SHAREBANK NAME=gprnobank START=0xC END=0x6F +SHAREBANK NAME=gprnobank START=0x8C END=0xCF + +SECTION NAME=PROG ROM=page +SECTION NAME=IDLOCS ROM=.idlocs +SECTION NAME=DEEPROM ROM=eedata |