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-rw-r--r--Makefile.inner6
1 files changed, 5 insertions, 1 deletions
diff --git a/Makefile.inner b/Makefile.inner
index 957843c..5838b33 100644
--- a/Makefile.inner
+++ b/Makefile.inner
@@ -15,6 +15,8 @@ SYN_FILES = \
$(HDL_DIR)/decoder.vhd \
$(HDL_DIR)/fifo.vhd \
$(HDL_DIR)/uart.vhd \
+ $(HDL_DIR)/onewire.vhd \
+ $(HDL_DIR)/timer0.vhd \
$(HDL_DIR)/ALU.vhd \
$(HDL_DIR)/stack.vhd \
$(HDL_DIR)/dpram.vhd \
@@ -30,6 +32,8 @@ SIM_FILES = \
$(HDL_DIR)/hexfile_reader.vhd \
$(HDL_DIR)/fifo.vhd \
$(HDL_DIR)/uart.vhd \
+ $(HDL_DIR)/onewire.vhd \
+ $(HDL_DIR)/timer0.vhd \
$(HDL_DIR)/ALU.vhd \
$(HDL_DIR)/stack.vhd \
$(HDL_DIR)/dpram.vhd \
@@ -48,7 +52,7 @@ $(BUILD):
# Synthesize
$(BUILD)/$(TOP).json: $(SYN_FILES) | $(BUILD)
ghdl -a $(STD) --workdir=$(BUILD) $(SYN_FILES)
- yosys $(MODULE) -p "ghdl $(STD) --workdir=$(BUILD) $(TOP); memory_map; synth_gowin -json $@ -family gw5a"
+ yosys $(MODULE) -p "ghdl $(STD) --workdir=$(BUILD) $(TOP); synth_gowin -json $@ -family gw5a -nolutram"
# Place and route
$(BUILD)/$(TOP)_pnr.json: $(BUILD)/$(TOP).json $(CST)